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?2006 fairchild semiconductor corporation april 3, 2006 fsam50sm60a april 3, 2006 fsam50sm60a spm tm (smart power module) general description fsam50sm60a is an advanced smart power module (spm) that fairchild has newly developed and designed to provide very compact and lo w cost, yet high performance ac motor drives mainly ta rgeting medium speed low-power inverter-driven applic ation like air conditioners. it combines optimized circuit protection and drive matched to low-loss igbts. highly effective shor t-circuit current detection/ protection is realized through the use of advanced current sensing igbt chips that allow continuous monitoring of the igbts current. system reliability is further enhanced by the built-in over-temperature and integrated under-voltage lock-out protection. the high speed built-in hvic provides opto-coupler-less igbt gate driv ing capability that further reduce the overall size of th e inverter system design. in addition the incorporated hvic facilitates the use of single- supply drive topology enabling the fsam50sm60a to be driven by only one drive s upply voltage without negative bias. inverter current sens ing application can be achieved due to the devided nagative dc terminals. features ? ul certified no. e209204 ? 600v-50a 3-phase igbt inverter bridge including control ics for gate driving and protection ? divided negative dc-link terminals for inverter current sensing applications ? single-grounded power supply due to built-in hvic ? typical switching frequency of 5khz ? built-in thermistor for over-temperature monitoring ? isolation rating of 2500vrms/min. ? very low leakage current due to using dbc (direct bonded copper) substrate ? adjustable current protection level by varying series resistor value with sense-igbts applications ? ac 100v ~ 253v three-phase inverter drive for small power ac motor drives ? home appliances applications like air conditioners drive system external view fig. 1. top view bottom view 60mm 31mm 60mm 31mm
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 integrated power functions ? 600v-50a igbt inverter for three-phase dc/ac power conversion (please refer to fig. 3) integrated drive, protection and system cont rol functions ? for inverter high-side igbts: gate drive circ uit, high voltage isolated high-speed level shifting control circuit under-voltage (uv) protection note) available bootstrap circuit ex ample is given in figs. 13 and 14. ? for inverter low-side igbts: gate dr ive circuit, short circuit protection (sc) control supply circuit under -voltage (uv) protection ? temperature monitoring: system over-tem perature monitoring using built-in thermistor note) available temperature monito ring circuit is given in fig. 14. ? fault signaling: corresponding to a sc fault (low-side ig bts) or a uv fault (low-s ide control supply circuit) ? input interface: 5v cmos/lsttl compatible, schmitt trigger input pin configuration fig. 2. top view case temperature(t c ) detecting point (26)n u (22)v b(w) (1)v cc(l) (2)com (l) (3)in (ul) (4)in (vl) (5)in (wl) (7)v fo (27)n v (28)n w (32)p (20)in (wh) (23)v s(w) (29)u (30)v (31)w (8)c fod (9)c sc (25)r th (24)v th (21)v cc(wh) (18)v b(v) (19)v s(v) (15)in v(h) (17)v cc(vh) (16)com (h) (13)v b(u) (14)v s(u) (11)in (uh) (12)v cc(uh) (10)r sc (6)com (l) dbc substrate case temperature(t c ) detecting point (26)n u (22)v b(w) (1)v cc(l) (2)com (l) (3)in (ul) (4)in (vl) (5)in (wl) (7)v fo (27)n v (28)n w (32)p (20)in (wh) (23)v s(w) (29)u (30)v (31)w (8)c fod (9)c sc (25)r th (24)v th (21)v cc(wh) (18)v b(v) (19)v s(v) (15)in v(h) (17)v cc(vh) (16)com (h) (13)v b(u) (14)v s(u) (11)in (uh) (12)v cc(uh) (10)r sc (6)com (l) dbc substrate
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 pin descriptions pin number pin name pin description 1v cc(l) low-side common bias voltage for ic and igbts driving 2com (l) low-side common supply ground 3in (ul) signal input terminal for low-side u phase 4in (vl) signal input terminal for low-side v phase 5in (wl) signal input terminal for low-side w phase 6com (l) low-side common supply ground 7v fo fault output 8c fod capacitor for fault output duration time selection 9c sc capacitor (low-pass filter) for short-circuit current detection input 10 r sc resistor for short-circuit current detection 11 in (uh) signal input for high-side u phase 12 v cc(uh) high-side bias voltage for u phase ic 13 v b(u) high-side bias voltage for u phase igbt driving 14 v s(u) high-side bias voltage ground fo r u phase igbt driving 15 in (vh) signal input for high-side v phase 16 com (h) high-side common supply ground 17 v cc(vh) high-side bias voltage for v phase ic 18 v b(v) high-side bias voltage for v phase igbt driving 19 v s(v) high-side bias voltage ground fo r v phase igbt driving 20 in (wh) signal input for high-side w phase 21 v cc(wh) high-side bias voltage for w phase ic 22 v b(w) high-side bias voltage for w phase igbt driving 23 v s(w) high-side bias voltage ground fo r w phase igbt driving 24 v th thermistor bias voltage 25 r th series resistor for the use of thermistor (temperature detection) 26 n u negative dc?link input terminal for u phase 27 n v negative dc?link input terminal for v phase 28 n w negative dc?link input terminal for w phase 29 u output for u phase 30 v output for v phase 31 w output for w phase 32 p positive dc?link input
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 internal equivalent circ uit and input/output pins note 1. inverter low-side is composed of three sense-igbts including freewheeling diodes for each igbt and one control ic which has g ate driving, current sensing and protection functions. 2. inverter power side is composed of four inverter dc-link input pins and three inverter output pins. 3. inverter high-side is composed of three normal-igbts including freewheeling diodes and three drive ics for each igbt. fig. 3. bottom view com(l) vcc in(ul) in(vl) in(wl) vfo c(fod) c(sc) out(ul) out(vl) out(wl) n u (26) n v (27) n w (28) u (29) v (30) w (31) p (32) (23) v s(w) (22) v b(w) (19) v s(v) (18) v b(v) (9) c sc (8) c fod (7) v fo (5) in (wl) (4) in (vl) (3) in (ul) (2) com (l) (1) v cc(l) (10) r sc r th (25) v th (24) (6) com (l) vcc vb out com vs in vb vs out in com vcc vcc vb out com vs in (21) v cc(wh) (20) in (wh) (17) v cc(vh) (15) in (vh) (16) com (h) (14) v s(u) (13) v b(u) (12) v cc(uh) (11) in (uh) thermistor
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 absolute maximum ratings (t j = 25c, unless otherwise specified) inverter part note 1. it would be recommended that the average junction temperature should be limited to t j 125 c (@t c 100 c) in order to guarantee safe operation. control part total system item symbol condition rating unit supply voltage v dc applied to dc - link 450 v supply voltage (surge) v pn(surge) applied between p- n 500 v collector-emitter voltage v ces 600 v each igbt collector current i c t c = 25c 50 a each igbt collector current i c t c = 100c 25 a each igbt collector current (peak) i cp t c = 25c , under 1ms pulse width 100 a collector dissipation p c t c = 25c per one chip 100 w operating junction temperature t j (note 1) -20 ~ 125 c item symbol condition rating unit control supply voltage v cc applied between v cc(uh) , v cc(vh) , v cc(wh) - com (h) , v cc(l) - com (l) 20 v high-side control bias voltage v bs applied between v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) 20 v input signal voltage v in applied between in (uh) , in (vh) , in (wh) - com (h) in (ul) , in (vl) , in (wl) - com (l) -0.3 ~ v cc +0.3 v fault output supply voltage v fo applied between v fo - com (l) -0.3 ~ v cc +0.3 v fault output current i fo sink current at v fo pin 5 ma current sensing input voltage v sc applied between c sc - com (l) -0.3 ~ v cc +0.3 v item symbol condition rating unit self protection supply voltage limit (short circuit protection capability) v pn(prot) applied to dc - link, v cc = v bs = 13.5 ~ 16.5v t j = 125c, non-repetitive, less than 6 s 400 v module case operation temperature t c note fig. 2 -20 ~ 100 c storage temperature t stg -20 ~ 125 c isolation voltage v iso 60hz, sinusoidal, ac 1 minute, connection pins to heat-sink plate 2500 v rms
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 absolute maximum ratings thermal resistance note 2. for the measurement point of case temperature(t c ), please refer to fig. 2. 3. the thickness of thermal grease should not be more than 100um. package marking and ordering information electrical characteristics inverter part (t j = 25c, unless otherwise specified) note 4. t on and t off include the propagation delay time of the internal drive ic. t c(on) and t c(off) are the switching time of igbt itself under the given gate driving condition internally. for the detailed information, please see fig. 4. item symbol condition min. typ. max. unit junction to case thermal resistance r th(j-c)q inverter igbt part (per 1/6 module) - - 1.0 c/w r th(j-c)f inverter fwdi part (per 1/6 module) - - 1.5 c/w contact thermal resistance r th(c-f) ceramic substrate (per 1 module) thermal grease applied (note 3) - - 0.06 c/w device marking device package real size tape width quantity fsam50sm60a fsam50sm60a SPM32-CA - - 8 item symbol condition min. typ. max. unit collector - emitter saturation voltage v ce(sat) v cc = v bs = 15v v in = 0v i c = 50a, t j = 25c - - 2.4 v fwdi forward voltage v fm v in = 5v i c = 50a, t j = 25c - - 2.1 v switching times t on v pn = 300v, v cc = v bs = 15v i c = 50a, t j = 25c v in = 5v ? 0v, inductive load (high-low side) (note 4) -0.69- s t c(on) -0.32- s t off -1.32- s t c(off) -0.46- s t rr -0.10- s collector - emitter leakage current i ces v ce = v ces , t j = 25c - - 250 a
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 fig. 4. switching time definition t rr i c v ce v in t on t c(on) v in(on) 10% i c 90% i c 10% v ce 100% i c (a) turn-on t rr i c v ce v in t on t c(on) v in(on) 10% i c 90% i c 10% v ce 100% i c (a) turn-on (b) turn-off i c v ce v in t off t c(off) 10% v ce 10% i c v in(off) (b) turn-off i c v ce v in t off t c(off) 10% v ce 10% i c v in(off)
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 electrical characteristics (t j = 25c, unless otherwise specified) control part note: 5. short-circuit current protection is functioning only at the low-sides. it would be recommended that the value of the external sensing resistor (r sc ) should be selected around 40 ? in order to make the sc trip-level of about 75a at the shunt resistors (r su ,r sv ,r sw ) of 0 ? . for the detailed information about the relationship between the external sensing resistor (r sc ) and the shunt resistors (r su ,r sv ,r sw ), please see fig. 6. 6. the fault-out pulse width t fod depends on the capacitance value of c fod according to the following approximate equation : c fod = 18.3 x 10 -6 x t fod [f] 7. t th is the temperature of thermistor itself. to know case temperature (t c ), please make the experiment considering your application. recommended oper ating conditions item symbol condition min. typ. max. unit quiescent v cc supply cur- rent i qccl v cc = 15v in (ul, vl, wl) = 5v v cc(l) - com (l) --26ma i qcch v cc = 15v in (uh, vh, wh) = 5v v cc(uh) , v cc(vh) , v cc(wh) - com (h) - - 130 ua quiescent v bs supply cur- rent i qbs v bs = 15v in (uh, vh, wh) = 5v v b(u) - v s(u) , v b(v) -v s(v) , v b(w) - v s(w) - - 420 ua fault output voltage v foh v sc = 0v, v fo circuit: 4.7k ? to 5v pull-up 4.5 - - v v fol v sc = 1v, v fo circuit: 4.7k ? to 5v pull-up - - 1.1 v short-circuit trip level v sc(ref) v cc = 15v (note 5) 0.45 0.51 0.56 v sensing voltage of igbt current v sen r sc = 40 ? , r su = r sv = r sw = 0 ? and i c = 75a (fig. 6) 0.45 0.51 0.56 v supply circuit under- voltage protection uv ccd detection level 11.5 12 12.5 v uv ccr reset level 12 12.5 13 v uv bsd detection level 7.3 9.0 10.8 v uv bsr reset level 8.6 10.3 12 v fault output pulse width t fod c fod = 33nf (note 6) 1.4 1.8 2.0 ms on threshold voltage v in(on) high-side applied between in (uh) , in (vh) , in (wh) - com (h) --0.8v off threshold voltage v in(off) 3.0 - - v on threshold voltage v in(on) low-side applied between in (ul) , in (vl) , in (wl) - com (l) --0.8v off threshold voltage v in(off) 3.0 - - v resistance of thermistor r th @ t th = 25c (note fig. 6) (note 7) - 50 - k ? @ t th = 100c (note fig. 6) (note 7) - 3.4 - k ? item symbol condition values unit min. typ. max. supply voltage v pn applied between p - n u , n v , n w - 300 400 v control supply voltage v cc applied between v cc(uh) , v cc(vh) , v cc(wh) - com (h) , v cc(l) - com (l) 13.5 15 16.5 v high-side bias voltage v bs applied between v b(u) - v s(u) , v b(v) - v s(v) , v b(w) - v s(w) 13.5 15 16.5 v blanking time for preventing arm-short t dead for each input signal 3.5 - - us pwm input signal f pwm t c 100c, t j 125c - 5 - khz input on threshold voltage v in(on) applied between in (uh) , in (vh) , in (wh) - com (h) , in (ul) , in (vl) , in (wl) - com (l) 0 ~ 0.65 v input off threshold voltage v in(off) applied between in (uh) , in (vh) , in (wh) - com (h) , in (ul) , in (vl) , in (wl) - com (l) 4 ~ 5.5 v
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 fig. 5. r-t curve of the built-in thermistor fig. 6. r sc variation by change of shunt resistors ( r su , r sv , r sw ) for short-circuit protection @ current trip level P 50a , @ current trip level P 75a 20 30 40 50 60 70 80 90 100 110 120 130 0 10 20 30 40 50 60 70 r-t curve resistance [k ? ] temperature t th [ ] 20 30 40 50 60 70 80 90 100 110 120 130 0 10 20 30 40 50 60 70 r-t curve resistance [k ? ] temperature t th [ ] 0.000 0.005 0.010 0.015 0.020 0.025 0.030 0 20 40 60 80 r su ,r sv ,r sw [ ? ] r sc [ ? ]
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 mechanical characteristics and ratings fig. 7. flatness measurement position of the dbc substrate note: 8. do not make over torque or mounting screws. much mounting torq ue may cause ceramic cracks and bolts and al heat-fin destructi on. 9. avoid one side tightening stress. fig.8 shows the recommended torque order for mounting screws. uneven mounting can cause the spm ceramic substrate to be damaged. fig. 8. mounting screws torque order (1 2) item condition limits units min. typ. max. mounting torque mounting screw: m4 (note 8 and 9) recommended 10kg?cm 8 10 12 kg?cm recommended 0.98n?m 0.78 0.98 1.17 n?m dbc flatness note fig.7 0 - +120 m weight -32- g (+) (+) (+) (+) (+) (+) (+) (+) (+) 1 2 1 2
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 time charts of spms protective function p1 : normal operation - igbt on and conducting current p2 : under voltage detection p3 : igbt gate interrupt p4 : fault signal generation p5 : under voltage reset p6 : normal operation - igbt on and conducting current fig. 9. under-voltage protection (low-side) p1 : normal operation - igbt on and conducting current p2 : under voltage detection p3 : igbt gate interrupt p4 : no fault signal p5 : under voltage reset p6 : normal operation - igbt on and conducting current fig. 10. under-voltage protection (high-side) internal igbt gate-emitter voltage input signal output current fault output signal control supply voltage p1 p2 p3 p4 p6 p5 uv detect uv reset internal igbt gate-emitter voltage input signal output current fault output signal control supply voltage v bs p1 p2 p3 p4 p6 p5 uv detect uv reset
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 p1 : normal operation - igbt on and conducting currents p2 : short-circuit current detection p3 : igbt gate interrupt / fault signal generation p4 : igbt is slowly turned off p5 : igbt off signal p6 : igbt on signal - but igbt cannot be turned on during the fault-output activation p7 : igbt off state p8 : fault-output reset and normal operation start fig. 11. short-circuit current protection (low-side operation only) internal igbt gate-emitter voltage input signal output current sensing voltage fault output signal p1 p2 p3 p4 p6 p5 p7 p8 sc reference voltage (0.5v) rc filter delay sc detection
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 note: 1) it would be recommended that by-pass capacitors for the gating input signals, in (ul) , in (vl) , in (wl) , in (uh) , in (vh) and in (wh) should be placed on the spm pins and on the both sides of cpu and spm for the fault output signal, v fo , as close as possible. 2) the logic input is compatible with standard cmos or lsttl outputs. 3) r pl c pl /r ph c ph /r pf c pf coupling at each spm input is recommended in order to prevent inpu t/output signals? oscillation and it should be as close as po ssible to each of spm pins. fig. 12. recommended cpu i/o interface circuit note: 1) it would be recommended that the bootstrap diode, d bs , has soft and fast recovery characteristics. 2) the bootstrap resistor (r bs ) should be 3 times greater than r e(h) . the recommended value of r e(h) is 5.6 ? , but it can be increased up to 20 ? for a slower dv/dt of high-side. 3) the ceramic capacitor placed between v cc -com should be over 1 f and mounted as close to the pins of the spm as possible. fig. 13. recommended bootstrap operation circuit and parameters cpu com 5v-line 1.2nf 0.47nf 1nf ? 4.7k ? 4.7k ,, in (ul) in (vl) in (wl) ,, in (uh) in (vh) in (wh) v fo ? 100 ? 100 ? 100 1nf spm ? 2k r pf =r pl =r ph = c pf =c pl =c ph = 15v-line 47uf 0.1uf 470uf 1uf one-leg diagram of fsam50sm60a vcc in com vb ho vs vcc in com out inverter output p n these values depend on pwm control algorithm d bs r e(h) r bs
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 note: 1) r pl c pl /r ph c ph /r pf c pf coupling at each spm input is recommended in order to prevent input signals? oscillation and it should be as close as possible to each spm input pin. 2) by virtue of integrating an application specific type hvic inside the spm, direct coupling to cpu terminals without any opto- coupler or transformer isolation is possible. 3) v fo output is open collector type. this signal line should be pulled up to the positive side of the 5v power supply with approxim ately 4.7k ? resistance. please refer to fig. 12. 4) c sp15 of around 7 times larger than bootstrap capacitor c bs is recommended. 5) v fo output pulse width should be determined by connecting an external capacitor(c fod ) between c fod (pin8) and com (l) (pin2). (example : if c fod = 33 nf, then t fo = 1.8 ms (typ.)) please refer to the note 6 for calculation method. 6) each input signal line should be pulled up to the 5v power supply with approximately 4.7k ? (at high side input) or 2k ? ( at low side input) resistance (other rc coupling circuits at each input may be needed depending on the pwm control scheme used and on the wiring impedance of the syste m?s printed circuit board). approximately a 0.22~2nf by-pass capacitor should be us ed across each power supply connection terminals. 7) to prevent errors of the protection function, the wiring around r sc , r f and c sc should be as short as possible. 8) in the short-circuit protection circuit, please select the r f c sc time constant in the range 3~4 s. 9) each capacitor should be mounted as close to the pins of the spm as possible. 10)to prevent surge destruction, the wiring between the smoothing capacitor and the p&n pins should be as short as possible. t he use of a high frequency non- inductive capacitor of around 0.1~0.22 f between the p&n pins is recommended. 11)relays are used at almost every systems of electrical equipments of home appliances. in these cases, there should be suffic ient distance between the cpu and the relays. it is recommended that the distance be 5cm at least. fig. 14. application circuit com(l) vcc in(ul) in(vl) in(wl) vfo c(fod) c(sc) out(ul) out(vl) out(wl) n u (26) n v (27) n w (28) u (29) v (30) w (31) p (32) (23) v s(w) (22) v b(w) (19) v s(v) (18) v b(v) (9) c sc (8) c fod (7) v fo (5) in (wl) (4) in (vl) (3) in (ul) (2) com (l) (1) v cc(l) (10) r sc v th (24) r th (25) (6) com (l) vcc vb out com vs in vb vs out in com vcc vcc vb out com vs in (21) v cc(wh) (20) in (wh) (17) v cc(vh) (15) in (vh) (16) com (h) (14) v s(u) (13) v b(u) (12) v cc(uh) (11) in (uh) fault 15v line c bs c bsc r bs d bs c bs c bsc r bs d bs c bs c bsc r bs d bs c sp15 c spc15 c fod 5v line r pf c pl c bpf r pl r pl r pl c pl c pl 5v line c ph r ph c ph r ph c ph r ph r s r s r s r s r s r s r s m vdc c dcs 5v line r th c sp05 c spc05 thermistor temp. monitoring gating uh gating vh gating wh gating wh gating vh gating uh c pf c p u r fu r fv r fw r su r sv r sw c fu c fv c fw w-phase current v-phase current u-phase current r f c sc r sc r csc r e(wh) r e(vh) r e(uh)
?2006 fairchild semiconductor corporation fsam50sm60a april 3, 2006 detailed package outline drawings SPM32-CA dimmensions in millimeters 60.0 0.50 53.0 0.30 19.86 0.30 28.0 0.30 31.0 0.50 13.6 0.30 #1 #23 #24 #32 28x2.00 0.30=( 56.0 ) (2.00) 2.00 0.30 0.40 0.60 0.10 max1.05 0.40 0.60 0.10 max1.00 ( 10.14 ) 11.0 0.30 3x7.62 0.30 =(22.86) 3x4.0 0.30 =(12.0 ) 2.00 0.30 (3.70) (3.50) max8.20 max1.00 0.80 1.30 0.10 max3.20 0.80 1.30 0.10 max2.50 0.40 0.60 0.10 max1.60 (34.80) ?4.30 36.05 0.50 7.20 0.5 12.30 0.5 ( 2. 5 ~ 5 . 5 ) 0 . 7 0 - 0 . 0 5 + 0 . 1 0 0 . 7 0 - 0 . 0 5 + 0 . 1 0
disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production isoplanar? littlefet? microcoupler? microfet? micropak? microwire? msx? msxpro? ocx? ocxpro? optologic ? optoplanar? pacman? pop? power247? poweredge? fast ? fastr? fps? frfet? globaloptoisolator? gto? hisec? i 2 c? i-lo ? implieddisconnect? intellimax? rev. i18 acex? activearray? bottomless? build it now? coolfet? crossvolt ? dome? ecospark? e 2 cmos? ensigna? fact? fact quiet series? powersaver? powertrench ? qfet ? qs? qt optoelectronics? quiet series? rapidconfigure? rapidconnect? serdes? scalarpump? silent switcher ? smart start? spm? stealth? superfet? supersot?-3 supersot?-6 supersot?-8 syncfet? tcm? tinylogic ? tinyopto? trutranslation? uhc? ultrafet ? unifet? vcx? wire? across the board. around the world.? the power franchise ? programmable active droop?

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